1. Field
Embodiments of the present disclosure relate to a semiconductor device for performing power management and a method of operating the same, and more particularly, to a semiconductor device for performing power management based on one or more tokens and an operation method thereof.
2. Description of the Related Art
During an operation of a semiconductor device, there may occur a period in which a peak instantaneous current flows in the semiconductor device, thereby consuming more power than the average power consumed by the semiconductor device.
A section corresponding to the period is called a peak zone (PKZ) and the operation including this section is called a peak zone operation.
When the semiconductor device includes a plurality of chips and the plurality of chips simultaneously perform respective peak zone operations, a failure may occur in the semiconductor device due to excessive current consumption.
In order to substantially prevent such a failure, a power management technique using token has been used in a conventional semiconductor device. Specifically, such a conventional semiconductor device includes a plurality of chips having a unidirectional ring structure.
A chip in the conventional semiconductor device having the unidirectional ring structure waits until a sufficient amount of token is collected to perform a peak zone operation. As used in this disclosure, the term ‘token’ indicates authorization to perform a specific operation. For example, when a chip receives token and an amount of the received token is equal to or greater than a threshold value, the chip can perform the specific operation. However, one of skilled in the art will understand that such references are merely for convenience of description and are not intended to limiting. Specifically, the term ‘an amount of token’ can be used interchangeably with another term ‘a number of tokens.’ For example, the amount of token equal to 70 can correspond to the number of tokens equal to 70.
As shown above, since the conventional semiconductor device has the unidirectional ring structure, when the conventional semiconductor device further includes a next chip operating subsequent to the chip, the next chip cannot perform a corresponding peak zone operation and is in a standby state until the chip performs the peak zone operation with the sufficient amount of token, even if the next chip has a sufficient amount of token to perform the corresponding peak zone operation. As a result, the operation performance of the conventional semiconductor device is deteriorated.
In addition, a dead-lock phenomenon in which a waiting time is not terminated may occur in the conventional semiconductor device, as will be described below with reference to FIG. 1. FIG. 1A to 1D are diagrams illustrating such a deadlock phenomenon of a conventional semiconductor device 10. Referring FIGS. 1A to 1D, the conventional semiconductor device 10 includes a first chip 11, a second chip 12, a third chip 13, and a fourth chip 14, which are connected in a unidirectional ring structure. The first chip 11, the second chip 12, and the third chip 13 perform first, second, and third operations, respectively, as will be described below.
At a first time, as shown in FIG. 1A, an amount of required token in the first chip 11 to perform the first operation and an amount of required token in the third chip 13 to perform the third operation are 30 and 80, respectively, and each of the second chip 12 and the fourth chip 14 does not require token. An amount of available token is 100 and the whole amount of the available token is provided to the first chip 11.
At a second time, as shown in FIG. 1B, the first chip 11 transfers remaining token having an amount (i.e., 70) to the third chip 13, the remaining token being obtained by subtracting the amount (i.e., 30) of the required token to perform the first operation from the amount (i.e., 100) of the available token in the first chip 11. Thus, an amount of available token in the third chip 13 becomes 70. That is, since a portion of the available token, which has an amount (i.e., 30) equal to the amount of the required token, is allocated to perform the first operation and the remaining token is transferred to the third chip 13, the amount of the allocated token in the first chip 11 becomes 30, and the amount of the available token in the third chip 13 becomes 70 at the second time.
At a third time, as shown in FIG. 1C, the first chip 11 is still performing the first operation, and the second chip 12 requires an amount (i.e., 40) of token to perform the second operation. In addition, the third chip 13 is waiting without performing the third operation since the amount (i.e., 70) of the available token in the third chip 13 is smaller than the amount of the required token to perform the third operation.
At a fourth time, as shown in FIG. 1D, after the first chip 11 has completed the first operation, and the first chip 11 transfers the amount (i.e., 30) of the available token to the second chip 12. However, at the fourth time, because the amount (i.e., 30) of the available token transferred to the second chip 12 and the amount (i.e., 70) of the available token in the third chip 13 are smaller than the amount (i.e., 40) of the required token in the second chip 12 and the amount (i.e., 80) of the required token in the third chip 13, respectively, each of the second chip 12 and the third chip 13 is waiting in a standby state until the amount of the available token becomes equal to or greater than the amount of the required token.
However, since no additional token can be provided to the second chip 12 and the third chip 13, the standby states of the second chip 12 and the third chip 13 may not be terminated, which is called as the “deadlock phenomenon.” Therefore, the semiconductor device 10 that includes the second and third chips 12 and 13 stops operating due to the deadlock phenomenon.
As described above, the conventional semiconductor device 10 has a drawback that the operation performance is deteriorated for power management, and the operation of the device 10 is interrupted under certain conditions.